Intel unveils new 3D chip packaging design

Intel unveils new 3D chip packaging design

Intel has unveiled a new packaging innovation for creating 3D chip packages and multiple chip connections ahead of the Semicon West conference in San Francisco this week.

The company is detailing its Embedded Multi-Die Interconnect Bridge (EMIB) technologies and Foveros 3D chip packages. This may sound like very inside baseball and best suited for the propellerhead crowd, but hear me out.

Chip packaging has always played a critical role in semiconductors, and it’s getting more important as chipmakers such as Intel and AMD strain against the limits of Moore’s Law. The chip’s package is how the chip’s electrical signals and power are routed.

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div#stuning-header .dfd-stuning-header-bg-container {background-image: url(;background-size: initial;background-position: top center;background-attachment: initial;background-repeat: no-repeat;}#stuning-header {min-height: 650px;}