New chip techniques are needed for the new computing workloads

New chip techniques are needed for the new computing workloads

Over the next two to three years, we will see an explosion of new complex processors that not only do the general-purpose computing we commonly see today (scalar and vector/graphics processing), but also do a significant amount of matrix and spatial data analysis (e.g., augmented reality/virtual reality, visual response systems, artificial intelligence/machine learning, specialized signal processing, communications, autonomous sensors, etc.).

In the past, we expected all newer-generation chips to add features/functions as they were being designed. But that approach is becoming problematic. As we scale Moore’s Law closer to the edge of physical possibility (from 10nm to 7, then 5), it becomes increasingly lengthy and costly to perfect the new processes. What was generally about 12 months between processing improvement steps now is closer to two years, and newer process factories can cost upwards of $10 billion or more.

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